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15.1 Processors, Parallel Processing & VMs

A Level · 17 questions found

  • RISC vs CISC: differences, interrupt handling on each
  • Pipelining and registers in RISC processors
  • Four computer architectures: SISD, SIMD, MISD, MIMD
  • Characteristics of massively parallel computers
  • Virtual machines: concept, roles, benefits and limitations
Q2
Oct/Nov 2024 Paper 3 v1

Reduced Instruction Set Computers (RISC) is a type of processor.

Identify four features of a RISC processor.

1

2

3

4 4 marks

Reduced Instruction Set Computers (RISC) is a type of processor. Identify four features of a RISC processor. 1 2 3 4 <span class="part-marks">4 marks</span>
Show mark scheme

2 [4 marks]

One mark per mark point ( Max 4) MP1 low number of instruction formats //low number of instruction sets MP2 uses single-clock cycle instructions MP3 uses fixed length instructions MP4 uses many general-purpose registers MP5 works well with pipelining MP6 hard-wired control unit MP7 makes extensive use of RAM MP8 uses a low number of addressing modes MP9 the design emphasis is on the software.

Q8
Oct/Nov 2024 Paper 3 v2

Complex Instruction Set Computer (CISC) is a type of processor.

Identify four features of a CISC processor.

1

2

3

4 4 marks

Complex Instruction Set Computer (CISC) is a type of processor. Identify four features of a CISC processor. 1 2 3 4 <span class="part-marks">4 marks</span>
Show mark scheme

8 [4 marks]

One mark per mark point ( Max 4) MP1 many instruction formats possible MP2 large instruction set MP3 many addressing modes available MP4 uses variable length/multi-operation instructions MP5 multi-clock cycle instructions MP6 complex decoding of instructions MP7 uses complex circuits MP8 makes frequent use of cache memory MP9 uses programmable control unit // uses micro-programmed control unit // uses hardwired control unit MP10 hardware needs to be able to handle more complex instructions convert into sub-instructions // Design emphasis is on the hardware.

Q2
Oct/Nov 2024 Paper 3 v3

Reduced Instruction Set Computers (RISC) is a type of processor.

Identify four features of a RISC processor.

1

2

3

4 4 marks

Reduced Instruction Set Computers (RISC) is a type of processor. Identify four features of a RISC processor. 1 2 3 4 <span class="part-marks">4 marks</span>
Show mark scheme

2 [4 marks]

One mark per mark point ( Max 4) MP1 low number of instruction formats //low number of instruction sets MP2 uses single-clock cycle instructions MP3 uses fixed length instructions MP4 uses many general-purpose registers MP5 works well with pipelining MP6 hard-wired control unit MP7 makes extensive use of RAM MP8 uses a low number of addressing modes MP9 the design emphasis is on the software.

Q11
May/Jun 2024 Paper 3 v1

Reduced Instruction Set Computers (RISC) and Complex Instruction Set Computers (CISC) are two types of processor.

(a) State two features of RISC processors. 2 marks

(b) Outline the process of interrupt handling as it could be applied to RISC or CISC processors. 3 marks

(c) Explain how pipelining affects interrupt handling for RISC processors. 3 marks

Reduced Instruction Set Computers (RISC) and Complex Instruction Set Computers (CISC) are two types of processor. ### (a) State **two** features of RISC processors. <span class="part-marks">2 marks</span> ### (b) Outline the process of interrupt handling as it could be applied to RISC or CISC processors. <span class="part-marks">3 marks</span> ### (c) Explain how pipelining affects interrupt handling for RISC processors. <span class="part-marks">3 marks</span>
Show mark scheme

11(a) [2 marks]

mark per mark point ( Max 2 ) Uses hard-wired code/control units Uses relatively few instructions / simple instructions Uses relatively few addressing modes Makes use of a single-cycle for each instruction Makes use of fixed length / fixed format instructions Makes use of general-purpose registers Pipelining is straightforward to apply The design emphasis is on the software Processor chips require few transistors.

11(b) [3 marks]

mark per mark point ( Max 3 ) Once the processor detects an interrupt at the start/end of the fetch-execute cycle … the current program is temporarily stopped and the status of each register stored on the stack. After the interrupt has been serviced/the Interrupt Service Routine (ISR) has been executed … … the registers can be restored to its original status before the interrupt was detected // … the data can be restored from the stack .

11(c) [3 marks]

mark per mark point ( Max 3 ) Pipelining adds an additional complexity // there could be a number of instructions still in the pipeline when the interrupt is received All the instructions currently in operation are usually discarded except for the last one/the one at write back … the interrupt handler routine is applied to the remaining instruction. Once the interrupt has been serviced the processor can restart with the next instruction in the sequence.

Q9
May/Jun 2024 Paper 3 v2

(a) Outline two benefits and two limitations of a virtual machine. 4 marks

Benefit 1

Benefit 2

Limitation 1

Limitation 2

(b) Explain the roles of the host operating system and the guest operating system as used in a computer system running a virtual machine. 3 marks

### (a) Outline **two** benefits and **two** limitations of a virtual machine. <span class="part-marks">4 marks</span> Benefit 1 Benefit 2 Limitation 1 Limitation 2 ### (b) Explain the roles of the host operating system and the guest operating system as used in a computer system running a virtual machine. <span class="part-marks">3 marks</span>
Show mark scheme

9(a) [4 marks]

mark per mark point for up to two benefits ( Max 2 ) COMPATIBILTY e.g. Applications that aren’t compatible with the host computer can be run on the virtual machine // It is possible to emulate old software on a new system by running a compatible guest operating system as a virtual machine // Software can be tried on different OS on the same hardware. PROTECTION e.g. The guest operating system has no effect on anything outside the virtual machine other virtual machines or the host computer//Virtual machines are useful for testing as they will not crash the host computer if something goes wrong // Easier to recover if software causes a system crash as virtual machine software protects the host system. COST e.g. No need to buy extra computers / hardware as multiple virtual machines can be implemented on the same hardware. mark per mark point for up to two limitations ( Max 2 ) PERFORMANCE e.g. The performance of the guest operating system will not be as good on a virtual machine as it would be on its own compatible machine because of the extra code / using more RAM/memory space // The performance of the VM is dependent on the capabilities of the host computer // Response times cannot be accurately measured using a virtual machine. COMPLEXITY e.g. Building an in-house virtual machine can be expensive, time consuming and complex to maintain / set-up. HARDWARE/SOFTWARE ISSUES e.g. Some hardware/software can’t be emulated with a virtual machine // Some of the host machine’s hardware can’t be directly accessed by the virtual machine.

9(b) [3 marks]

mark per mark point – host operating system ( Max 2 ) The host operating system is the normal operating system for the host computer / machine. It has control of all the resources of the host computer / machine. // It can access the physical resources of the host computer / machine. It provides a user interface to operate the virtual machine software. It also runs the virtual machine software. mark per mark point – guest operating system ( Max 2 ) The guest operating system runs within the virtual machine. … it controls the virtual hardware/software during the emulation. // It accesses the actual hardware through the virtual machine and host operating system. It provides a virtual user interface for the emulated hardware/software. The guest operating system runs under the control of the host operating system.

Q11
May/Jun 2024 Paper 3 v3

Reduced Instruction Set Computers (RISC) and Complex Instruction Set Computers (CISC) are two types of processor.

(a) State two features of RISC processors. 2 marks

(b) Outline the process of interrupt handling as it could be applied to RISC or CISC processors. 3 marks

(c) Explain how pipelining affects interrupt handling for RISC processors. 3 marks

Reduced Instruction Set Computers (RISC) and Complex Instruction Set Computers (CISC) are two types of processor. ### (a) State **two** features of RISC processors. <span class="part-marks">2 marks</span> ### (b) Outline the process of interrupt handling as it could be applied to RISC or CISC processors. <span class="part-marks">3 marks</span> ### (c) Explain how pipelining affects interrupt handling for RISC processors. <span class="part-marks">3 marks</span>
Show mark scheme

11(a) [2 marks]

mark per mark point ( Max 2 ) Uses hard-wired code/control units Uses relatively few instructions / simple instructions Uses relatively few addressing modes Makes use of a single-cycle for each instruction Makes use of fixed length / fixed format instructions Makes use of general-purpose registers Pipelining is straightforward to apply The design emphasis is on the software Processor chips require few transistors.

11(b) [3 marks]

mark per mark point ( Max 3 ) Once the processor detects an interrupt at the start/end of the fetch-execute cycle … the current program is temporarily stopped and the status of each register stored on the stack. After the interrupt has been serviced/the Interrupt Service Routine (ISR) has been executed … … the registers can be restored to its original status before the interrupt was detected // … the data can be restored from the stack .

11(c) [3 marks]

mark per mark point ( Max 3 ) Pipelining adds an additional complexity // there could be a number of instructions still in the pipeline when the interrupt is received All the instructions currently in operation are usually discarded except for the last one/the one at write back … the interrupt handler routine is applied to the remaining instruction. Once the interrupt has been serviced the processor can restart with the next instruction in the sequence.

Q8
May/Jun 2023 Paper 3 v1

Outline the characteristics of massively parallel computers. 3 marks

Outline the characteristics of massively parallel computers. <span class="part-marks">3 marks</span>
Show mark scheme

8 [2 marks]

One mark per mark point ( Max 3 ) MP1 A large number of computer processors / separate computers connected together MP2 … simultaneously performing a set of coordinated computations // collaborative processing MP3 network infrastructure MP4 communicate using a message interface / by sending messages.

Q8
May/Jun 2023 Paper 3 v2

(a) Describe the use of pipelining in Reduced Instruction Set Computers (RISC). 2 marks

(b) The processing of instructions is divided into five stages: 4 marks

  • instruction fetch (IF)

  • instruction decode (ID)

  • operand fetch (OF)

  • instruction execute (IE)

  • write back result (WB)

Each stage is carried out using a different register when pipelining is used.

Complete the table to show how a program consisting of six instructions would be completed using pipelining.

Clock cycles

1 2 3 4 5 6 7 8 9 10 11 12
IF
ID
OF
IE
WB
### (a) Describe the use of pipelining in Reduced Instruction Set Computers (RISC). <span class="part-marks">2 marks</span> ### (b) The processing of instructions is divided into five stages: <span class="part-marks">4 marks</span> - instruction fetch (IF) - instruction decode (ID) - operand fetch (OF) - instruction execute (IE) - write back result (WB) Each stage is carried out using a different register when pipelining is used. Complete the table to show how a program consisting of **six** instructions would be completed using pipelining. **Clock cycles** ||1|2|3|4|5|6|7|8|9|10|11|12| |---|---|---|---|---|---|---|---|---|---|---|---|---| |**IF**||||||||||||| |**ID**||||||||||||| |**OF**||||||||||||| |**IE**||||||||||||| |**WB**|||||||||||||
Show mark scheme

8(a)

One mark per mark point ( Max 2 ) MP1 Pipelining allows several instructions to be processed simultaneously / concurrently. MP2 … therefore, increasing the CPU instruction throughput / the number of instructions completed per unit of time. MP3 Each instruction stage / subtask is completed during one clock cycle MP4 No two instructions can execute their same stage of instruction / subtask at the same clock cycle. MP5 … e.g., while one instruction is being decoded, the next instruction can be fetched, etc.

8(b) [3 marks]

One mark per mark point ( Max 4 )  First stage of first instruction in first clock cycle  First instruction successfully completed over five clock cycles  Remaining instructions completed over ten clock cycles …  … with no extra instruction sections added on any row. Example answer 1 Clock cycles 1 2 3 4 5 6 7 8 9 10 11 12 IF 1.1 2.1 3.1 4.1 5.1 6.1 Processor stages ID 1.2 2.2 3.2 4.2 5.2 6.2 OF 1.3 2.3 3.3 4.3 5.3 6.3 IE 1.4 2.4 3.4 4.4 5.4 6.4 WB 1.5 2.5 3.5 4.5 5.5 6.5 Example answer 2 Clock cycles 1 2 3 4 5 6 7 8 9 10 11 12 Processor stages

Q8
May/Jun 2023 Paper 3 v3

Outline the characteristics of massively parallel computers. 3 marks

Outline the characteristics of massively parallel computers. <span class="part-marks">3 marks</span>
Show mark scheme

8 [2 marks]

One mark per mark point ( Max 3 ) MP1 A large number of computer processors / separate computers connected together MP2 … simultaneously performing a set of coordinated computations // collaborative processing MP3 network infrastructure MP4 communicate using a message interface / by sending messages.

Q5
Oct/Nov 2022 Paper 3 v1

(a) Write the infix expression in Reverse Polish Notation (RPN). 1 mark

      a * b + b - d + 15

(b) (i) Write the RPN expression in infix form. 1 mark

        a b - c d + * a /

(ii) Evaluate your infix expression from part (b)(i) when a = 5, b = 10, c = 27 and d = 12. 1 mark

### (a) Write the infix expression in Reverse Polish Notation (RPN). <span class="part-marks">1 mark</span> ``` a * b + b - d + 15 ``` **(b) (i)** Write the RPN expression in infix form. <span class="part-marks">1 mark</span> ``` a b - c d + * a / ``` #### (ii) Evaluate your infix expression from **part (b)(i)** when a = 5, b = 10, c = 27 and d = 12. <span class="part-marks">1 mark</span>
Show mark scheme

5(a) [1 mark]

(a - b) * (c + d) / a

5(b)(i) [1 mark]

–39

5(b)(ii) [1 mark]

Q5
Oct/Nov 2022 Paper 3 v2

Describe what is meant by a virtual machine . Include in your answer two benefits and two drawbacks of using a virtual machine.

Description

Benefit 1

Benefit 2

Drawback 1

Drawback 2 6 marks

Describe what is meant by a **virtual machine** . Include in your answer **two** benefits and **two** drawbacks of using a virtual machine. Description Benefit 1 Benefit 2 Drawback 1 Drawback 2 <span class="part-marks">6 marks</span>
Show mark scheme

5 [6 marks]

One mark for each description ( Max 2 ) • The emulation of a computer system / hardware and/or software • … using a host computer system. • Using guest operating system(s) for emulation. One mark for each correct benefit ( Max 2 ) • Multiple guest operating systems / VMs can be used on the same computer. • Different instruction set architectures can be emulated on a single computer. • A virtual machine can crash without affecting the host machine. • There are security benefits // Trying a piece of suspicious software and if it is / has a virus, it will only infect the virtual machine. • Cost savings due to not needing to purchase extra hardware. • Can run legacy applications that are currently incompatible. One mark for each correct drawback ( Max 2 ) • A virtual machine is less efficient / has poorer performance than real machines computer • Performance of the guest system cannot be adequately measured. • A virtual machine may be affected by any weaknesses of the host machine. • Costly and/or complex to maintain / implement / manage . • Cannot emulate some hardware.

Q5
Oct/Nov 2022 Paper 3 v3

(a) Write the infix expression in Reverse Polish Notation (RPN). 1 mark

      a * b + b - d + 15

(b) (i) Write the RPN expression in infix form. 1 mark

        a b - c d + * a /

(ii) Evaluate your infix expression from part (b)(i) when a = 5, b = 10, c = 27 and d = 12. 1 mark

### (a) Write the infix expression in Reverse Polish Notation (RPN). <span class="part-marks">1 mark</span> ``` a * b + b - d + 15 ``` **(b) (i)** Write the RPN expression in infix form. <span class="part-marks">1 mark</span> ``` a b - c d + * a / ``` #### (ii) Evaluate your infix expression from **part (b)(i)** when a = 5, b = 10, c = 27 and d = 12. <span class="part-marks">1 mark</span>
Show mark scheme

5(a) [1 mark]

(a - b) * (c + d) / a

5(b)(i) [1 mark]

–39

5(b)(ii) [1 mark]

Q4
May/Jun 2022 Paper 3 v1

Reduced Instruction Set Computers (RISC) and Complex Instruction Set Computers (CISC) are two types of processor.

(a) Describe what is meant by RISC and CISC processors . 4 marks

RISC

CISC

(b) Identify two differences between RISC and CISC processors. 2 marks

1

2

Reduced Instruction Set Computers (RISC) and Complex Instruction Set Computers (CISC) are two types of processor. ### (a) Describe what is meant by **RISC** and **CISC processors** . <span class="part-marks">4 marks</span> RISC CISC ### (b) Identify **two** differences between RISC and CISC processors. <span class="part-marks">2 marks</span> 1 2
Show mark scheme

4(a) [4 marks]

max 2 any two from: Uses simple instructions Uses fixed length instructions Instructions only require one clock cycle Uses many registers Makes use of pipelining Hardwired CU max 2 any two from: Uses many instruction formats Uses variable length instructions Makes use of different addressing modes Uses few registers Has a large instruction set Requires complex circuits Frequently uses cache Instructions (converted to sub-instructions that) may require many clock cycles Programmable CU

4(b) [2 marks]

One mark for each difference max 2 from: RISC has fewer instructions // CISC has more instructions RISC has many registers // CISC has few registers RISC’s instructions are simpler // CISC’s instructions are more complex RISC has a few instruction formats / CISC has many instruction formats RISC usually uses single-cycle instructions// CISC uses multi-cycle instructions RISC uses fixed-length instructions // CISC uses variable-length instructions RISC has better pipelineability // CISC has poorer pipelineability RISC requires less complex circuits// CISC requires more complex circuits RISC has fewer addressing modes // CISC has more addressing modes RISC makes more use of RAM// CISC makes more use of cache/less use of RAM RISC has a hard-wired control unit // CISC has a programmable control unit RISC only uses load and store instructions to address memory // CISC has many types of instructions to address memory

Q6
May/Jun 2022 Paper 3 v1

A virtual machine is used to emulate a new computer system.

Describe two benefits and one limitation of using a virtual machine for this purpose.

Benefit 1

Benefit 2

Limitation 6 marks

A virtual machine is used to emulate a new computer system. Describe **two** benefits and **one** limitation of using a virtual machine for this purpose. Benefit 1 Benefit 2 Limitation <span class="part-marks">6 marks</span>
Show mark scheme

6 [6 marks]

marks each benefit description max 4 New system can be tried on different virtual hardware (1) without need to purchase the hardware (1) Easier to recover if software emulating the new computer causes system crash (1) as VM provides protection to other software (1) Emulate programs for the new computer system that are not compatible with the host computer / operating system (1) by using the guest operating system on the old computer (1) More than one new computer system can be emulated (1) this allows multiple operating systems to coexist on a single computer(1) marks each limitation description max 2 from: Virtual machines may not be able to emulate the new hardware (1) because this hardware may have been developed since the virtual machine was developed (1) Using virtual machine means execution of extra code // A virtual machine might not be as efficient // resources e.g. memory or processor time are shared (1) processing time increased // performance degrades (1) Use of a virtual machine increases the maintenance overheads (1) because both host system and the virtual machine must be maintained (1)

Q5
May/Jun 2022 Paper 3 v2

There are four basic categories of computer architecture. Single Instruction Single Data (SISD) is one architecture.

Identify the three other categories of computer architecture.

Describe each category that you identify.

Architecture 1

Description

Architecture 2

Description

Architecture 3

Description 6 marks

There are four basic categories of computer architecture. Single Instruction Single Data (SISD) is one architecture. Identify the **three** **other** categories of computer architecture. Describe each category that you identify. Architecture 1 Description Architecture 2 Description Architecture 3 Description <span class="part-marks">6 marks</span>
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5 [6 marks]

SIMD (1) many/array processors execute the same instruction using different data sets (1) MISD (1) many processors (using different instructions) use the same data set (1) MIMD (1) many processors (using different instructions) using different data sets (1)

Q4
May/Jun 2022 Paper 3 v3

Reduced Instruction Set Computers (RISC) and Complex Instruction Set Computers (CISC) are two types of processor.

(a) Describe what is meant by RISC and CISC processors . 4 marks

RISC

CISC

(b) Identify two differences between RISC and CISC processors. 2 marks

1

2

Reduced Instruction Set Computers (RISC) and Complex Instruction Set Computers (CISC) are two types of processor. ### (a) Describe what is meant by **RISC** and **CISC processors** . <span class="part-marks">4 marks</span> RISC CISC ### (b) Identify **two** differences between RISC and CISC processors. <span class="part-marks">2 marks</span> 1 2
Show mark scheme

4(a) [4 marks]

max 2 any two from: Uses simple instructions Uses fixed length instructions Instructions only require one clock cycle Uses many registers Makes use of pipelining Hardwired CU max 2 any two from: Uses many instruction formats Uses variable length instructions Makes use of different addressing modes Uses few registers Has a large instruction set Requires complex circuits Frequently uses cache Instructions (converted to sub-instructions that) may require many clock cycles Programmable CU

4(b) [2 marks]

One mark for each difference max 2 from: RISC has fewer instructions // CISC has more instructions RISC has many registers // CISC has few registers RISC’s instructions are simpler // CISC’s instructions are more complex RISC has a few instruction formats / CISC has many instruction formats RISC usually uses single-cycle instructions// CISC uses multi-cycle instructions RISC uses fixed-length instructions // CISC uses variable-length instructions RISC has better pipelineability // CISC has poorer pipelineability RISC requires less complex circuits// CISC requires more complex circuits RISC has fewer addressing modes // CISC has more addressing modes RISC makes more use of RAM// CISC makes more use of cache/less use of RAM RISC has a hard-wired control unit // CISC has a programmable control unit RISC only uses load and store instructions to address memory // CISC has many types of instructions to address memory

Q6
May/Jun 2022 Paper 3 v3

A virtual machine is used to emulate a new computer system.

Describe two benefits and one limitation of using a virtual machine for this purpose.

Benefit 1

Benefit 2

Limitation 6 marks

A virtual machine is used to emulate a new computer system. Describe **two** benefits and **one** limitation of using a virtual machine for this purpose. Benefit 1 Benefit 2 Limitation <span class="part-marks">6 marks</span>
Show mark scheme

6 [6 marks]

marks each benefit description max 4 New system can be tried on different virtual hardware (1) without need to purchase the hardware (1) Easier to recover if software emulating the new computer causes system crash (1) as VM provides protection to other software (1) Emulate programs for the new computer system that are not compatible with the host computer / operating system (1) by using the guest operating system on the old computer (1) More than one new computer system can be emulated (1) this allows multiple operating systems to coexist on a single computer(1) marks each limitation description max 2 from: Virtual machines may not be able to emulate the new hardware (1) because this hardware may have been developed since the virtual machine was developed (1) Using virtual machine means execution of extra code // A virtual machine might not be as efficient // resources e.g. memory or processor time are shared (1) processing time increased // performance degrades (1) Use of a virtual machine increases the maintenance overheads (1) because both host system and the virtual machine must be maintained (1)